Director of Northeastern University Computer Architecture Research Laboratory, and co-author of Computer Architecture: A Quantitative Approach. Professional information with some links.
ASynchronous, open source, Processor IP of the DLX Architecture. Goal: show feasibility to design and deliver asynchronous open IPs in portable, re-usable way. Information, downloads. Open source hardware.
Program for MS Windows, an assembly interpreter for DLX assembly language; instructions, source code, downloads. By Javier Echaiz, National University of the South.
Interactive visual pipeline simulator using DLX instruction set; operation of pipelined processor is easier to understand than trying to imagine operation from text descriptions; modified and extended from DLXsim. Documents, downloads.
Set of tools to build and simulate programs to run on DLX architecture, for exploring an operating system (DLXOS) in a simulated environment. Overview, architecture, OS, simulator, debugger, instructions.
Information on DLX processor simulator and compiler, DLXsim, interactive program, loads assembly programs and simulates operation of computer on them, single-stepping or continuous execution.
