Philip J. Koopman, Jr., CMU page. Reports, studies, and links. Compares: CISC, RISC, Stack systems; 2 and 3 stack systems.

Online encyclopedia article about this single machine language opcode, with links to related articles.

Automatic Synthesis of Application Specific Processors. Goal: design, build high-performance processors via a new class of transport-triggered architectures, TTAs, programmed by specifying data-transports not operations; well suited for application sp...

Research project for high performance, low cost computing. Uses stack-based instructions for a 4-way VLIW processor. Implemented in current technology, it would outrun high-end DSPs (TMS 320C6x, TigerSHARC), and let the full program run on one process...

Designs, builds: single board computers (SBC), peripherals, embedded systems, PCB design/layout, high level programming (industry leaders in Forth), custom design work; large line of stock products: from full handheld computers to development packages...

Online encyclopedia article about this approach to computer architecture.

Makes IGNITE I ROSC (Removed Operand Set Computer), PSC1000 32-bit embedded shBoom-based microprocessor line, many ISDN interface products, sophisticated antenna/radar technologies.

JOP is the implementation of a small java processor with the JVM fitting in a FPGA.

Uses of Forth microprocessors and programming language: controllers for spacecraft flight systems, on-board payload experiments, ground support; hardware or software to build or test flight or ground systems.

Explains extreme, simple RISC, with only one instruction, move memory to memory; yet it is useful. Revision of paper first published in ACM Computer Architecture News.